1. Field of the Invention
The present invention relates to the field of fabrication of semiconductor devices. More specifically, the invention relates to epitaxial growth in fabrication of silicon-germanium (SiGe) semiconductor devices.
2. Background Art
In a heterojunction bipolar transistor, or HBT, a thin silicon-germanium layer is grown as the base of a bipolar transistor on a silicon wafer. The silicon-germanium HBT has significant advantages in speed, frequency response, and gain when compared to a conventional silicon bipolar transistor. Speed and frequency response can be compared by the cutoff frequency which, simply stated, is the frequency where the gain of a transistor is drastically reduced. Cutoff frequencies in excess of 100 GHz have been achieved for the SiGe HBT, which are comparable to more expensive GaAs and other devices. Previously, silicon-only devices have not been competitive for use where high speed and frequency response are required.
The higher gain, speeds, and frequency response of the SiGe HBT have been achieved as a result of certain advantages of silicon-germanium not available with pure silicon, for example, narrower band gap, and reduced resistivity. Silicon-germanium may be epitaxially grown on a silicon substrate using conventional silicon processing and tools. This technique allows one to engineer device properties such as the energy band structure and carrier mobility. For example, it is known in the art that grading the concentration of germanium in the silicon-germanium base builds into the HBT device an electric field or potential gradient, which accelerates the carriers across the base, thereby increasing the speed of the HBT device compared to a silicon-only device. A common method for fabricating silicon and silicon-germanium devices is by chemical vapor deposition (xe2x80x9cCVDxe2x80x9d). A reduced pressure chemical vapor deposition technique, or RPCVD, used to fabricate the HBT device allows for a controlled grading of germanium concentration across the base layer as well as precise control over the doping profile. As already noted, speeds in the range of approximately 100 GHz have been demonstrated for silicon-germanium devices, such as the HBT.
Epitaxial growth of silicon-germanium on a silicon surface that is sufficiently high quality to meet the demands of fabrication for devices such as the HBT demands that the silicon surface be as near as possible to a perfect crystal surface. Specifically, the silicon surface must not be contaminated and must be free from surface irregularities, which include pits or hillocks. The presence of contaminants and surface irregularities on the silicon surface has the deleterious effect on the subsequent epitaxy of silicon-germanium so as to compromise the crystalline lattice perfection of the silicon-germanium layer, which therefore can negate the benefit of epitaxy. For example, physical contaminants on the initial or starting silicon surface will result in defective epitaxial material in the form of planar crystalline defects. Pits can be formed, for example, in the process of removing silicon oxide contaminants as further discussed below.
The epitaxy of silicon-germanium integrates two dissimilar materials. The benefit of this integration is the tailoring of electronic band structure so as to build a high-performance SiGe HBT device. The drawback is the development of strain between the two materials, which imposes practical limits on device design, i.e. thickness and germanium concentration. The stability and overall perfection of the strained layers depends on the condition of starting silicon surface, since imperfections, regardless of origin, act as heterogeneous nucleation sites increasing the potential defectivity of the epitaxial silicon-germanium layer. Increasing strain either by increasing thickness or germanium concentration of the layer puts stricter acceptable limits for surface imperfections or irregularities.
The presence of contaminants and surface irregularities on the silicon surface can adversely affect yield of the fabrication process, device performance, or device reliability. For example, defects due to contamination may cause the wafer to fail quality checks and inspections within the fabrication process resulting in fewer wafers completing the fabrication process and higher costs due to lower yield. Device performance can be changed, for example, by unwanted mobile ionic contaminants resulting in a device unsuitable for the use for which it was designed. Device reliability can be adversely affected, for example, by small amounts of metallic contaminants which can travel in the device and eventually cause failure. Therefore, it is important to control the presence of contaminants and surface irregularities on the silicon surface in order to prevent adverse effects on yield, performance, and reliability of silicon-germanium devices.
Contaminants, which must be removed from the silicon surface, include particulate matter, organic residue, and inorganic residue. By way of example, particulate matter includes dust and smoke particles, as well as other impurities commonly found in the air, and bacteria that grow in water systems and on surfaces not cleaned regularly. Organic residues are chemical compounds containing carbon; for example, oils in fingerprints. Inorganic residues are chemical compounds not containing carbon; for example, hydrochloric acid or hydrofluoric acid which may be introduced from other steps in the wafer processing. As these examples indicate, the sources of contamination include materials which are omnipresent in the environment, such as carbon and oxygen, but also include other steps in the fabrication process, for example, chemical residue on RPCVD reactor walls or residual oxides from typical cleaning solvents such as peroxides.
One method for cleaning the wafer surface prior to epitaxial deposition processes is to employ a sequence of heated, peroxide-charged hydrochloric acid and ammonia hydroxide baths. Very harsh solvents can be used because the silicon surface is extremely resistant to almost all acids and bases. The silicon surface, however, will almost immediately react with and bind to impurities that are always present in the air and in aqueous solutions. By way of contrast, an oxygenated silicon surface (i.e. glass) is quite inert. Oxygen is therefore provided in the final step of the clean in order to form a glassy silicon oxide protective surface over the silicon surface. The silicon oxide protects the previously exposed silicon surface while the wafer is in transition from the cleaning area to the RPCVD reactor.
Prior to subsequent epitaxial deposition, the protective silicon oxide and any residual contaminants must be removed from the silicon surface. One common method is that the silicon oxide can be sublimated in-situ from the silicon surface in the RPCVD reactor by exposing the surface to a high temperature, approximately 900xc2x0 C. or greater for a duration of approximately 5 minutes, in a hydrogen environment. Once a clean silicon surface has been established, epitaxy of the silicon-germanium layers can begin immediately. However, the processing temperature of these layers is considerably different than the temperature required for surface preparation. For example, fabrication of silicon-germanium layers is carried out at low temperatures, less than 700xc2x0 C. During this temperature transition, which could require the wafer several minutes to cool and stabilize, the surface is at risk for possible recontamination from the reactor environment. For example, recontamination can originate from the RPCVD reactor quartz or by out diffusion of dopants from the silicon substrate. In addition, from a manufacturing perspective, the thermal cycling-required for a high-temperature cleaning regimen only adds to the total processing time, which slows the overall wafer throughput. Decreased wafer throughput is a further disadvantage of a high-temperature cleaning regimen.
One key disadvantage of a high-temperature cleaning regimen is the additional thermal budget when considering the integration of the silicon-germanium base region in the overall fabrication of the HBT. Increasingly, there is a driving force to reduce the thermal budget to minimize dopant diffusion, particularly for advanced CMOS generations. In the specific case of a silicon-germanium BiCMOS process, the fabrication of the HBT device must also meet the stringent requirements for thermal budget so as to not compromise CMOS electrical characteristics. One example where additional thermal budget impacts CMOS, i.e. the threshold voltage, is quite sensitive and can change as a result of the excess dopant diffusion. Therefore, it is important in silicon-germanium processing to maintain a low thermal budget, or to not introduce additional thermal budget.
Thus, there is need in the art to improve the thermal budget of methods used to clean and remove contaminants from silicon surfaces prior to epitaxial deposition of silicon-germanium. There is further need in the art to improve the yield for fabrication of silicon-germanium semiconductor devices by improving the methods used to clean and remove contaminants from the silicon surface prior to epitaxial deposition of silicon-germanium.
There is also need in the art to lower the operating temperature of the methods used to clean and remove contaminants from silicon surfaces prior to epitaxial deposition of silicon-germanium in order to prevent alteration or destruction of other CMOS structures on the same wafer. There is further need in the art to improve the throughput of methods used to clean and remove contaminants from silicon surfaces prior to epitaxial deposition of silicon-germanium by improving the thermal budget of the cleaning methods.
The present invention is directed to method for elimination of contaminants prior to epitaxy and related structure. The invention overcomes the need in the art to improve the thermal budget used to clean and remove contaminants from silicon surfaces prior to epitaxial deposition of silicon-germanium. The invention also improves the yield for fabrication of silicon-germanium semiconductor devices.
Further, the invention lowers the operating temperature used to clean and remove contaminants from the silicon surface prior to epitaxial deposition of silicon-germanium in order to prevent alteration or destruction of other CMOS structures on the same wafer. Moreover, the invention improves the throughput in cleaning and removing contaminants from the silicon surface prior to epitaxial deposition of silicon-germanium by improving the thermal budget.
According to the invention the surface of a semiconductor wafer is covered by a protective oxide. For example, the protective oxide can be silicon oxide and the semiconductor wafer can be a silicon wafer. The semiconductor wafer is then placed in a CVD reactor at a first temperature. For example, the first temperature can be approximately 650xc2x0 C.
Contaminants and the protective oxide are then removed from the surface of the semiconductor wafer at the first temperature. For example, contaminants and the protective oxide can be removed from the surface of a silicon wafer by using an etchant, such as Hydrogen Chloride (HCl), and a precursor, such as Dichlorosilane (SiH2Cl2 or xe2x80x9cDCSxe2x80x9d), in appropriate proportions. While contaminants and the protective oxide are being removed by the action of HCl and DCS, any silicon being removed from the surface of the silicon wafer, is being replenished so that there is no net change in the amount of silicon on the surface of the wafer. After removal of the contaminants and the protective oxide, epitaxial growth is performed on the surface of the semiconductor wafer at the first temperature. For example, silicon germanium epitaxial growth can be performed on the surface of a silicon wafer.
Moreover, a structure comprising an epitaxially grown region can be fabricated according to the method of the invention discussed herein. For example, a silicon-germanium base region of a heterojunction bipolar transistor can be formed on a silicon surface prepared according to the method of the invention.